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                <text>Patent Number: 201941035816, Applicant: Jayanta Biswas.&#13;
The present invention is related to the Buck converter output ripple voltage analysis field, more particularly, the present invention is related to integrated synchronous buck converter emulation and method of design thereof. A DC-DC synchronous buck converter is emulated on FPGA based on geometric model of average inductor current. The integrated synchronous buck converter achieves precise regulation of the output voltage to fulfill the requirements of DVS applications.</text>
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                <text>Samanta, Debabrata.</text>
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