Occupancy Monitoring to Prevent Spread of COVID-19 in Public Places Using AI
The chapter aims to automate the counting of people for occupancy monitoring and send an alert email if the occupancy exceeds the defined threshold in case of restricted occupancy guidelines. The study aims to reduce the manual error, effort, and time for people counting and provide a tool for footfall analysis. We propose and implement an occupancy monitoring system by counting the number of people entering and exiting a building/room using cameras and machine learning (ML) algorithms. The Single Shot Detector (SSD) algorithm, which is based on the MobileNet architecture, is used. This project provides an effective process for execution using either a recorded video file or a live stream from a camera. As the system automates counting people, it reduces human effort and error. It provides accurate results on time. The project can be implemented anywhere using a laptop and a camera for capturing the video. Thus, it provides high portability of the project. The system can leverage pre-installed CCTV cameras and systems in colleges, malls, offices, etc. Thus, it requires less additional expenses and is economically friendly for the organization/decision-making authority. This chapter includes implications for various use cases such as ensuring adherence to COVID-19 guidelines by organizations, streamlining janitorial services, prevention of stampedes, improving indoor air quality, improving electricity efficiency, etc. This project fulfills an identified need to automate the people counting process and generate alerts accordingly. 2025 by Apple Academic Press, Inc.
Pardal H.; Kapse M.; Sharma V.; Elangovan N.
Sustainability in Marketing Practice: Strategies for Industry 4.0, pp. 281-294.
Pardal H., Oracle Corporation, Karnataka, Bangalore, India; Kapse M., Symbiosis Center for Management and Human Resource Development, Symbiosis International University, Maharashtra, Pune, India; Sharma V., Symbiosis Center for Management and Human Resource Development, Symbiosis International University, Maharashtra, Pune, India; Elangovan N., School of Business and Management, Christ University, Karnataka, Bangalore, India
Global and Indian Perspectives on Russia-Ukraine War using Sentiment Analysis
Aspect-based sentiment analysis; Multinomial Nae Bayes; NRCLex; Operation Ganga; Russia-Ukraine war; Sentiment analysis
In today's world, social media has become a platform through which people express their opinions and thoughts regarding various topics. Twitter is one such platform wherein people resort to expressing their opinions or portraying sentiments to the world. Today it has become easier to analyze mass opinion by using sentiment analysis. This paper investigates the ongoing Russia-Ukraine war by analyzing opinionated tweets, and it seeks to understand the sentiments from a global and Indian perspective. Operation Ganga was carried out to evacuate Indian citizens from the war-hit region. Multinomial Naive Bayes classifier classified the tweets into positive, neutral, and negative categories. The paper employed NRCLex for emotion classification and aspect-based sentiment analysis to divide opinions into aspects and determine the sentiment associated with each element. For the study, 4,31,857 tweets were extracted, and the results of sentiment analysis depict that 44.09% users had negative sentiments followed by 33.378% users expressing positive sentiment and remaining 22.53% people were neutral in their tweets. Fear, anger and sadness were amongst the top emotions expressed in the negative tweets whereas the positive tweets expressed trust and anticipation that the war would end soon. Operation Ganga was carried out to evacuate Indian citizens from the war-hit region. An analysis was performed on 1542 tweets that were obtained for Operation Ganga. 74.5% of the users had positive sentiments about Operation Ganga, whereas 16.67% and 8.5% had negative and neutral sentiments respectively. The people trusted this evacuation process resulting in more positive sentiments. Fear of losing near and dear ones and fear of safety was the topmost concern for Indians and leadership was one of the topmost aspects tweeted in the positive sentiments. Thus, the overall results depict that the common man does not prefer war and is fearful of the outcomes. The government should hear the voice of the common man and plan strategies and decisions considering the common man's sentiments. 2022 ACM.
Pardal H.; Nagarajan K.; Mahara T.; Josephine V. L H.
ACM International Conference Proceeding Series
Pardal H., Christ (Deemed to Be University), Karnataka, Bengaluru, India; Nagarajan K., Christ (Deemed to Be University), Karnataka, Bengaluru, India; Mahara T., Welingkar Institute of Management Development and Research, Karnataka, Bengaluru, India; Josephine V. L H., Christ (Deemed to Be University), Karnataka, Bengaluru, India
Celebration of christmas as a symphony of interfaith in ?tm?nut?pam of St Chavara
Brahmac?rinis; Brahman?than; Dhy?nasall?pangal; Inculturation; Kaliyugam; P?j?-dravyas; RSIS; Sany?s?nur?panam; Sravanam; S?nti; Tiru-vedam; Veda-n?dhn; ?tm?nut?pam
This article is an attempt to reflect on the interfaith consciousness of St Kuriakose Elias Chavara, by making an Indian reading of his classical work ?tm?nut?pam, specifically focusing on how the incarnation of Christ is presented and celebrated with an open and inclusive approach. In ?tm?nut?pam, while explaining the episode of the Infancy Narrative, St Chavara addresses Child Jesus with the significant Indian name, Brahman?than, and Jesus is being worshipped by Brahmac?rinis with unique Indian offerings. The addition of an Indian character called S?nti as an aged shepherdess making conversation with Mother Mary makes the narrative Indian. Because of his deep and affective knowledge of Indian culture and religion, and having a moving openness and a dialogical approach to them, St. Chavara could develop a relevant cultural modification of his faith, which will have its unique stamp in the Indian Christian Theology. 2017 Journal of Dharma: Dharmaram Journal of Religions and Philosophies.
Journal of Dharma, Vol-42, No. 4, pp. 475-489.
Parecattil J., Sanskrit and Indian Philosophy, Christ University, India
A Review on Rural Womens Entrepreneurship Using Machine Learning Models
Machine learning model; MSME; Rural entrepreneurship; Women
Rural womens entrepreneurship has contributed significantly to the countrys economy. Entrepreneurship rates have fluctuated in recent years, according to a variety of reasons including economic, social, and cultural influences. Therefore, machine learning models are used to assess the features to make better business decisions. In this research paper, papers from 2009 to 2022 were studied and found that machine learning models are being used to improve womens entrepreneurship. In this paper, nine machine learning models have been described in detail which include multiple regression, lasso regression, logistic regression, decision tree, Naive Bayes, clustering, classification, deep learning, artificial neural network, etc. In the study of all these models, it was found how accurately this model has been used in womens entrepreneurship work. It has been observed that by using different machine learning models with the data acquired from rural entrepreneurship, women entrepreneurs may use a new way of understanding the dynamics of rural entrepreneurship. Various machine learning models have been studied to improve rural development for women working in rural areas. Thus, we have proposed a comparative study of various machine learning models to predict entrepreneurship-based data. The findings of this study may be used to assess how rural women entrepreneurs may change the decisions made in several domains, such as making use of different economic policies and promoting the long-term viability of women entrepreneurs for the countrys economic growth. The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2023.
Pareek S.; Bhatnagar V.; Poonia R.C.; Sharma S.; Samanta D.
Lecture Notes in Networks and Systems, Vol-680 LNNS, pp. 375-395.
Springer Science and Business Media Deutschland GmbH
Pareek S., Department of Computer Applications, Manipal University Jaipur, Rajasthan, Jaipur, India; Bhatnagar V., Department of Computer Applications, Manipal University Jaipur, Rajasthan, Jaipur, India; Poonia R.C., Professor, Department of Computer Science, CHRIST (Deemed to be University), Delhi NCR, Uttar Pradesh, Ghaziabad, India; Sharma S., Department of Computer Applications, Manipal University Jaipur, Rajasthan, Jaipur, India; Samanta D., Department of Computing Information Technologies, RIT Kosovo (A.U.K), Rochester Institute of Technology RIT Global Campus n.n., Germia Campus, Pristina, Kosovo, 10000
Quantum Cryptography: The Future of Data Security in Smart Urban Environments
As cities adopt integrated IoT ecosystems and data-driven urban governance, traditional encryption faces the threat of obsolescence by quantum computing attacks. This chapter explores the application of quantum cryptography in protecting smart urban infrastructure, with a focus on quantum key distribution (QKD), post-quantum algorithms, and hybrid systems. Through an examination of deployments in smart grids, traffic management systems, and public health platforms, we illustrate how quantum-resistant protocols reduce threats of data breaches and spoofing attacks. There are special challenges: scaling QKD to millions of IoT devices will need new network architectures, and integrating with legacy systems will need phased "crypto-agility" plans. The chapter presents a model for incorporating quantum-safe practice into urban design, with an emphasis on inter-disciplinary collaboration among cryptographers, policymakers, and city administrators. 2026, IGI Global Scientific Publishing. All rights reserved.
Securing Smart Cities Through Modern Cryptography Technologies;pp.191-224
Restricted Access; Hardcopy may be available in the library
https://doi.org/10.4018/979-8-3373-3326-7.ch007 https://www.scopus.com/pages/publications/105026208700?origin=resultslist
Pareek N., Christ University, Delhi, India; Saini N., Christ University, Delhi, India
Constraints on the Labour Market Trajectory of Youth and Growth of NEET in India
India; NEET population; unemployment; Youth
This paper explores the trends, composition, and determinants of the rising Not in Employment, Education and Training (NEET) population in India. Based on the national level employment-unemployment surveys and macro level panel data, and using instrumental variable (IV) Probit and system generalized method of moments (GMM) regression models, it is explored that a set of supply and demand side factors determining the growth of NEET population in India. At the micro level, the individuals level of general education, technical and vocational training, gender, occupation and gender of head of the family, religion, standard of living of the family, earnings of the spouse, and a set of complex socio-cultural factors determine the NEET status of educated and trained youth. On the other hand, the macro level factors, including the growth of mechanization in agriculture, stagnant real wages, sluggish non-farm sector output growth, infrastructural backwardness, and the existing social-cultural setup in which educated youth live together create a negative macro level environment that compels them to remain out of the workforce for a longer period even after completion of their education/training. Based on these results, it is argued that policies aiming at the development of infrastructure along with the promotion of industry and modern service sectors should be given the top priority for checking the upsurge in the NEET population in India. 2023 XLRI Jamshedpur, School of Business Management & Human Resources.
Management and Labour Studies, Vol-49, No. 3, pp. 477-503.
Parida J.K., School of Economics, University of Hyderabad, Hyderabad, Telangana, Gachibowli, India; Pattayat S.S., Department of Economics, Christ University (YPR), Nagasandra, Karnataka, Bangalore, India
Why is the size of discouraged labour force increasing in India?
Discouraged labour force; India; Multinomial logit and GMM estimation; Youth unemployment
The Indian economy is currently passing through a critical phase of economic development as its structural transformation in employment has stalled, whilst both the youth unemployment rate and the number of youths Not in Employment, Education, and Training (NEET) have increased to an unprecedentedly high level. In the context in which the share of the youth population is continuing to rise despite the declining fertility rate to below the replacement rate, increased educated youth unemployment has caused an upsurge in the Discouraged Labour Force (DLF). This paper explores the trends, composition, and determinants of rising DLF in India using national level employment-unemployment surveys and macro-level panel data. Based on Multinomial logit and System GMM regression results, it is argued that policies aiming to enhance human capabilities through an improved base of technical education and the promotion of industry are necessary to enhance the growth of quality jobs in order to combat the problem of rising educated youth unemployment and DLF. Moreover, these measures could help in the process of harnessing the demographic dividend in India through an increased level of labour productivity in the long run. 2023, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.
Economic Change and Restructuring, Vol-56, No. 5, pp. 3601-3630.
Parida J.K., School of Economics, University of Hyderabad, Gachibowli, Telangana, Hyderabad, 500046, India; Pattayat S.S., Department of Economics, Christ University (YPR), Nagasandra, Near Tumkur Road, Karnataka, Bangalore, 560073, India; Verick S., ILO International Labour Organization, Geneva, Switzerland, Institute of Labour Economics, Bonn, Germany
Production of biodiesel from waste fish fat through ultrasound-assisted transesterification using petro-diesel as cosolvent and optimization of process parameters using response surface methodology
Cosolvent; Fourier transform infrared spectroscopy; Free fatty acid; Homogeneous catalyst; Optimization; Ultrasonication
Biodiesel is a highly promising and viable alternative to fossil-based diesel that also addresses the urgent need for effective waste management. It can be synthesized by the chemical modification of triglycerides sourced from vegetable origin, animal fat, or algal oil. The transesterification reaction is the preferred method of producing biodiesel. However, the non-miscibility of alcohol and oil layer causes excessive utilization of alcohol, catalyst, and a substantial reacting time and temperature. In the current investigation, transesterification of waste fish oil was performed with petro-diesel as cosolvent, under the influence of ultrasound energy. The combination of both techniques is a unique and efficient way to minimize the mass transfer limitations considerably and hence reduces the parameters of the reaction. It is also a sincere effort to comply with the principles of green chemistry. The optimum reaction conditions were obtained using response surface methodology (RSM) that were as follows: molar ratio of methanol to oil 9.09:1, catalyst concentration of 0.97 wt%, cosolvent concentration of 29.1 wt%, temperature 60.1?, and a reacting time 30min. Under these listed conditions, 98.1% biodiesel was achievable, which was in close agreement with the expected result. In addition, the cosolvent removal step from the crude biodiesel was also eliminated as it could be employed as a blended fuel in CI engines. The Author(s) 2024.
Parida S.; Pali H.S.; Chaturvedi A.; Sharma A.; Balasubramanian D.; Ramegouda R.; Tran V.D.; Nguyen V.G.; Shobanabai F.J.J.; Varuvel E.G.
Environmental Science and Pollution Research, Vol-31, No. 17, pp. 25524-25537.
All Open Access; Green Open Access; Hybrid Gold Open Access
ISSN: 9441344; PubMed ID: 38472585; CODEN: ESPLE
Parida S., G.L.Bajaj Institute of Technology and Management, 201306, Greater Noida, India; Pali H.S., Renewable Energy and Alternative Fuel Lab, National Institute of Technology, Srinagar-190006, Jammu-Kashmir, India; Chaturvedi A., Renewable Energy and Alternative Fuel Lab, National Institute of Technology, Srinagar-190006, Jammu-Kashmir, India; Sharma A., Department of Mechanical Engineering, Loknayak Jayprakash Institute of Technology, Chapra-841302, Bihar, India; Balasubramanian D., Department of Mechanical Engineering, Mepco Schlenk Engineering College, Tamil Nadu, Sivakasi, India; Ramegouda R., Department of Mechanical and Automobile Engineering, CHRIST University, Bangalore, India; Tran V.D., PATET Research Group, Ho Chi Minh City University of Transport, Ho Chi Minh City, Viet Nam; Nguyen V.G., Institute of Engineering, HUTECH Universit, Ho Chi Minh City, Viet Nam; Shobanabai F.J.J., Department of Computer Engineering, Faculty of Engineering and Natural Sciences, Istinye University, Istanbul, Turkey, Department of Autotronics, Institute of Automobile Engineering, Saveetha School of Engineering, Saveetha Institute of Medical and Technical Sciences, Tamil Nadu, Chennai, 602105, India; Varuvel E.G., Department of Mechanical Engineering, Faculty of Engineering and Natural Sciences, Istinye University, Istanbul, Turkey, Department of Automobile Engineering, Faculty of Engineering and Technology, SRM Institute of Science and Technology, Tamil Nadu, Kattankulathur, 603203, India
Digital Feminism: Reclaiming Power and Identity in the Algorithmic Age
In the algorithmic age, digital platforms are vital for visibility, expression, and agency, making feminism crucial at empowerment and control intersections. Digital Feminism transcends an online movement; its an evolving ideological space challenging patriarchy in data systems, algorithmic design, and AI. This chapter as per the author, explores gender bias in digital infrastructures, marginalizing feminist voices while offering resistance and solidarity tools. Using feminist theory, digital humanities, and media studies, it views Digital Feminism as critiquing and reconstructing algorithmic culture. Interdisciplinary reflection examines feminist activism in digital spaces, algorithmic patriarchy implications, and feminist data ethics. The chapter advocates inclusive, transparent, feminist- aligned digital futures where technology aligns with equity, accountability, and care. 2026 by IGI Global Scientific Publishing. All rights reserved.
Digital Ideologies in the Age of Algorithmic Culture;pp.181-212
https://doi.org/10.4018/979-8-3373-4531-4.ch006 https://www.scopus.com/pages/publications/105036801208?origin=resultslist
Parihar V., Christ University, India; Singh T., Christ University, India
Efficient Power Conversion in Single-Phase Grid-Connected PV Systems through a Nine-Level Inverter
Efficiency; multilevel inverter; pulse width modulation; reduced switches; THD
In this paper, a novel nine-level inverter-based method for achieving efficient power conversion in single-phase grid-connected photovoltaic (PV) systems is proposed. The traditional two-level inverter has poor power quality and a high harmonic content. By using fewer power switches and adding more voltage levels, the proposed nine-level inverter gets around these restrictions, improving power conversion efficiency and lowering total harmonic distortion (THD). The effectiveness of the indicated technique for accomplishing better power quality and greater overall system efficiency is demonstrated by the simulation findings. A promising approach to improving the efficiency of single-phase grid-connected PV systems is the suggested nine-level inverter. 2023 IEEE.
Parimalasundar E.; Cheepati K.R.; Kamalkumar V.; Suresh K.; Devaraju T.; Kumar B.H.
2023 2nd International Conference on Trends in Electrical, Electronics and Computer Engineering, TEECCON 2023, pp. 1-6.
Institute of Electrical and Electronics Engineers Inc.
https://doi.org/10.1109/TEECCON59234.2023.10335776 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85181532747&doi=10.1109%2fTEECCON59234.2023.10335776&partnerID=40&md5=4fdfea49f1ac8e13cc3e67f88db17c2c
Parimalasundar E., Mohan Babu University (Erstwhile Sree Vidyanikethan Engineering College), Electrical and Electronics Engineering, Tirupati, India; Cheepati K.R., Kandula Sreenivasa Reddy Memorial College of Engineering, Electrical and Electronics Engineering, Kadapa, India; Kamalkumar V., KPR Institute of Engineering and Technology Coimbatore, Electrical and Electronics Engineering, Coimbatore, India; Suresh K., Christ University, Electrical and Electronics Engineering, Bangalore, India; Devaraju T., Mohan Babu University (Erstwhile Sree Vidyanikethan Engineering College), Electrical and Electronics Engineering, Tirupati, India; Kumar B.H., Mohan Babu University (Erstwhile Sree Vidyanikethan Engineering College), Electrical and Electronics Engineering, Tirupati, India
Efficient Integration of Photovoltaic Cells with Multiport Converter for Enhanced Energy Harvesting
Battery; Efficiency; Multiport converter; PV Cell
This research work presents a novel approach for the efficient integration of photovoltaic (PV) cells with a multiport converter to enhance energy harvesting in renewable energy systems. The proposed system combines the advantages of PV technology with the flexibility and scalability of multiport converters, enabling improved power extraction and utilization from solar energy sources. The integration is achieved by employing a multi-input multi-output (MIMO) control strategy, which optimally distributes power among multiple energy storage systems and loads. A comprehensive modeling and analysis of the PV cell characteristics and the multiport converter are conducted to identify the optimal operating conditions. Furthermore, a power management algorithm is developed to dynamically regulate the power flow and maximize the energy harvesting efficiency. The proposed approach demonstrates superior performance compared to traditional single-input single-output converters, achieving higher energy yields and enabling effective integration of PV cells in diverse applications. Simulation results validate the effectiveness of the proposed approach, showcasing its potential to significantly enhance energy harvesting from photovoltaic sources and contribute to the development of sustainable and reliable renewable energy systems. 2023 IEEE.
Parimalasundar E.; Jayakumar S.; Chandrika V.S.; Muthukaruppasamy S.; Devaraju T.; Suresh K.
Proceedings of the 5th International Conference on Inventive Research in Computing Applications, ICIRCA 2023, pp. 1590-1595.
Parimalasundar E., Mohan Babu University, Erst while Sree Vidyanikethan Engineering College, Electrical and Electronics Engineering, Tirupati, India; Jayakumar S., Sri Sairam College of Engineering, Electronics and Communication Engineering, Bengaluru, India; Chandrika V.S., Kpr Institute of Engineering and Technology, Electrical and Electronics Engineering, Coimbatore, India; Muthukaruppasamy S., Velammal Institute of Technology, Electrical and Electronics Engineering, Chennai, India; Devaraju T., Mohan Babu University, Erst while Sree Vidyanikethan Engineering College, Electrical and Electronics Engineering, Tirupati, India; Suresh K., Christ University, Electrical and Electronics Engineering, Bangalore, India
Enhanced Design and Performance Analysis of a Seven-Level Multilevel Inverter for High-Power Applications
The structure and performance analysis of a seven-level multilevel inverter is discussed in this study. Due to their capacity to get around the drawbacks of traditional two-level inverters, like high voltage stress on power devices and harmonic distortion, multilevel inverters have attracted a lot of attention lately. Multiple voltage levels can be produced by the seven-level multilevel inverter which is being proposed because it uses a sequential arrangement of power sources and capacitors. The design methodology involves selecting appropriate power devices and capacitance values to achieve the desired voltage levels while minimizing losses and ensuring reliable operation. Total harmonic distortion (THD), inverter efficiency, and voltage stress on power devices are all considered as part of the performance analysis. In comparison to conventional two-level inverters, simulation results indicate that the proposed seven-level multilevel inverter offers lower THD, increased efficiency, and reduced voltage stress. This research contributes to the advancement of multilevel inverter technology and its potential applications in various power conversion systems. 2023 IEEE.
Parimalasundar E.; Jayakumar S.; Nagajothi P.; Chandrika V.S.; Devaraju T.; Suresh K.
Proceedings of the 2023 2nd International Conference on Augmented Intelligence and Sustainable Systems, ICAISS 2023, pp. 1862-1868.
Parimalasundar E., Mohan Babu University (Erst while Sree Vidyanikethan Engineering College), Electrical and Electronics Engineering, Tirupati, India; Jayakumar S., Sri Sairam College of Engineering, Electronics and Communication Engineering, Bengaluru, India; Nagajothi P., S.A. Engineering College, Electrical and Electronics Engineering, Chennai, India; Chandrika V.S., Kpr Institute of Engineering and Technology, Electrical and Electronics Engineering, Coimbatore, India; Devaraju T., Mohan Babu University (Erst while Sree Vidyanikethan Engineering College), Electrical and Electronics Engineering, Tirupati, India; Suresh K., Christ University, Electrical and Electronics Engineering, Bangalore, India
Strategic Power Factor Management for Elevated Lift and Hoist Performance
Capacitance Bank; Energy Consumption; Induction Motor; Power Factor Correction; Reactive Power Compensation
The paper outlines the design and simulation of active power factor correction for a 100 hp induction motor using MATLAB/Simulink. In this system, the induction motor functions as the primary load, operating with a low power factor. Different load scenarios are simulated to examine the motor's performance. The current drawn from the supply is verified under varying conditions, both with and without the implementation of a variable capacitance bank. The power system network comprises apparatus such as Induction Motors, Power Transformers, and Induction Furnaces, contributing to a low power factor. The resultant low power factor leads to elevated energy consumption. To mitigate this, power factor correction is imperative. Utilizing a variable capacitance proves instrumental in enhancing the power factor. The capacitor compensates for a portion of the reactive power, consequently reducing the total reactive power drawn from the source. This reduction in reactive power contributes to an overall decrease in power consumption. The research focus is on the effective correction of the power factor for a 100 hp induction motor through comprehensive design and simulation using MATLAB/Simulink, providing valuable insights into the impact of variable capacitance on current draw under diverse load conditions. 2024 IEEE.
Parimalasundar E.; Jayakumar S.; Ravikumar R.; Kannan V.K.; Sindhuja R.; Suresh K.
10th International Conference on Advanced Computing and Communication Systems, ICACCS 2024, pp. 270-274.
Parimalasundar E., Mohan Babu University (Erstwhile Sree Vidyanikethan Engineering College), Electrical and Electronics Engineering, Tirupati, India; Jayakumar S., Sri Sairam College of Engineering, Electronics and Communication Engineering, Bengaluru, India; Ravikumar R., Karpagam Institute of Technology, Electrical and Electronics Engineering, Coimbatore, India; Kannan V.K., Knowledge Institute of Technology, Electrical and Electronics Engineering, Salem, India; Sindhuja R., Srm Institute of Science and Technology, Electrical and Electronics Engineering, Chennai, India; Suresh K., Christ University, Electrical and Electronics Engineering, Bengaluru, India
Analysis of Nine Level Single-Phase Cascaded H-Bridge Inverters for EVs
Efficiency; Electric Vehicle Charging; Harmonic distortion; PV energy system; PWM
This paper explores the design and operation of a Modular Nine-Level Inverter (MLI)-Electric Vehicle (EV) charging system, incorporating solar energy to power domestic loads and charge EVs. The system comprises a solar panel, DC-DC regulator, and MLI for efficient energy conversion. The MLI's modular design reduces complexity and enhances efficiency. Equivalent circuits illustrate voltage level generation, while PWM control regulates power device switching for precise output control. Performance metrics, including regulated DC supply voltage and staircase nine-level output voltage, demonstrate the system's capability for diverse applications. A nearly sinusoidal current waveform and harmonic analysis underscore the system's effectiveness in delivering stable power with reduced harmonic distortion. Comparisons between filtered and unfiltered output highlight the importance of filtering techniques in improving power quality. Overall, the MLI-EV charging system showcases advancements in renewable energy integration, offering a versatile solution for sustainable electricity generation and EV charging. 2024 IEEE.
Parimalasundar E.; Jayakumar S.; Sita H.; Jayanthi R.; Hemanth Kumar B.; Suresh K.
2024 3rd International Conference on Smart Technologies and Systems for Next Generation Computing, ICSTSN 2024
https://doi.org/10.1109/ICSTSN61422.2024.10671325 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85205310396&doi=10.1109%2fICSTSN61422.2024.10671325&partnerID=40&md5=c0c2585d09eef4a5ece38497cd87b79a
Parimalasundar E., Mohan Babu University, Erstwhile Sree Vidyanikethan Engineering College, Electrical and Electronics Engineering, Tirupati, India; Jayakumar S., Sri Sairam College of Engineering, Electronics and Communication Engineering, Bengaluru, India; Sita H., Mother Theresa Institute of Engineering and Technology, Electrical and Electronics Engineering, Palamaner, India; Jayanthi R., Karpagam College of Engineering, Electrical and Electronics Engineering, Coimbatore, India; Hemanth Kumar B., Mohan Babu University, Erstwhile Sree Vidyanikethan Engineering College, Dept of EEE, Tirupati, India; Suresh K., Christ University, Electrical and Electronics Engineering, Bangalore, India
Analyzing Dual-Stage Inverter Performance for Solar Grid Integration
Boost converter; Dual-stage inverter; Grid interaction; Photovoltaic; Utility grid
This paper presents a comprehensive analysis of the performance of dual-stage inverters in the context of solar grid integration through simulation. Dual-stage inverters are increasingly recognized for their potential to enhance the efficiency and reliability of solar power systems by mitigating grid disturbances and optimizing energy extraction. Through detailed simulation studies, this research evaluates key performance metrics such as grid stability, power quality, and energy conversion efficiency. The simulation environment enables the exploration of various operational scenarios and system configurations to assess the versatility and robustness of dual-stage inverter solutions. Furthermore, the study investigates the impact of control strategies and parameter variations on the overall performance of dual-stage inverters, providing valuable insights for system optimization and design. 2024 IEEE.
Parimalasundar E.; Jayakumar S.; Sita H.; Muthukaruppasamy S.; Suresh K.; Kumar B.H.
Proceedings of International Conference on Circuit Power and Computing Technologies, ICCPCT 2024, pp. 669-674.
Parimalasundar E., Mohan Babu University (Erstwhile Sree Vidyanikethan Engineering College), Electrical and Electronics Engineering, Tirupati, India; Jayakumar S., Sri Sairam College of Engineering, Electronics and Communication Engineering, Bengaluru, India; Sita H., Mother Theresa Institute of Engineering and Technology, Electrical and Electronics Engineering, Palamaner, India; Muthukaruppasamy S., Velammal Institute of Technology, Electrical and Electronics Engineering, Chennai, India; Suresh K., Christ University, Electrical and Electronics Engineering, Bengaluru, India; Kumar B.H., Mohan Babu University (Erstwhile Sree Vidyanikethan Engineering College), Electrical and Electronics Engineering, Tirupati, India
Investigation of efficient multilevel inverter for photovoltaic energy system and electric vehicle applications
conduction loss; multilevel inverter; pulse-width modulation; switching loss; total harmonic distortion
Introduction. This research presents a simple single-phase pulse-width modulated 7-level inverter topology for renewable system which allows home-grid applications with electric vehicle charging. Although multilevel inverters have appealing qualities, their vast range of application is limited by the use of more switches in the traditional arrangement. As a result, a novel symmetrical 7-level inverter is proposed, which has the fewest number of unidirectional switches with gate circuits, providing the lowest switching losses, conduction losses, total harmonic distortion and higher efficiency than conventional topology. The novelty of the proposed work consists of a novel modular inverter structure for photovoltaic energy system and electric vehicle applications with fewer numbers of switches and compact in size. Purpose. The proposed system aims to reduce switch count, overall harmonic distortions, and power loss. There are no passive filters required, and the constituted optimizes power quality by producing distortion-free sinusoidal output voltage as the level count increases while reducing power losses. Methods. The proposed topology is implemented with MATLAB/Simulink, using gating pulses and various pulse-width modulation methodologies. Moreover, the proposed model also has been validated and compared to the hardware system. Results. Total harmonic distortion, number of power switches, output voltage, current, power losses and number of DC sources are investigated with conventional topology. Practical value. The proposed topology has proven to be extremely beneficial for implementing photovoltaic-based stand-alone multilevel inverter and electric vehicle charging applications. References 16, table 1, figures 18. E. Parimalasundar, R. Jayanthi, K. Suresh, R. Sindhuja.
Parimalasundar E.; Jayanthi R.; Suresh K.; Sindhuja R.
Electrical Engineering and Electromechanics, Vol-2023, No. 4, pp. 47-51.
National Technical University "Kharkiv Polytechnic Institute"
All Open Access; Gold Open Access; Green Open Access
Parimalasundar E., Department of Electrical & Electronics Engineering, Sree Vidyanikethan Engineering College, AP, Tirupati, 517102, India; Jayanthi R., Department of Electrical and Electronics Engineering, Karpagam College of Engineering, Coimbatore, 641021, India; Suresh K., Department of Electrical and Electronics Engineering, Christ (Deemed to be University), Bangalore, India; Sindhuja R., Department of Electrical & Electronics Engineering, Sree Vidyanikethan Engineering College, AP, Tirupati, 517102, India
Performance investigation of modular multilevel inverter topologies for photovoltaic applications with minimal switches
fast Fourier transform; multilevel inverter; photovoltaic; pulse width modulation techniques; total harmonic distortion
Introduction. In recent years, a growing variety of technical applications have necessitated the employment of more powerful equipment. Power electronics and megawatt power levels are required in far too many medium voltage motor drives and utility applications. It is challenging to incorporate a medium voltage grid with only one power semiconductor that has been extensively modified. As a result, in high power and medium voltage settings, multiple power converter structure has been offered as a solution. A multilevel converter has high power ratings while also allowing for the utilization of renewable energy sources. Renewable energy sources such as photovoltaic, wind, and fuel cells may be readily connected to a multilevel inverter topology for enhanced outcomes. The novelty of the proposed work consists of a novel modular inverter structure for solar applications that uses fewer switches. Purpose. The proposed architecture is to decrease the number of switches and Total Harmonic Distortions. There is no need for passive filters, and the proposed design enhances power quality by creating distortion-free sinusoidal output voltage as the level count grows while also lowering power losses. Methods. The proposed topology is implemented with MATLAB / Simulink, using gating pulses and various pulse width modulation methodologies. Moreover, the proposed model also has been validated and compared to the hardware system. Results. Total harmonic distortion, number of power switches, output voltage and number of DC sources are compared with conventional topologies. Practical value. The proposed topology has been very supportive for implementing photovoltaic based multilevel inverter, which is connected to large demand in grid. References 12, table 5, figures 23. E. Parimalasundar, N.M.G. Kumar, P. Geetha, K. Suresh.
Parimalasundar E.; Kumar N.M.G.; Geetha P.; Suresh K.
Electrical Engineering and Electromechanics, Vol-2022, No. 6, pp. 28-34.
Parimalasundar E., Department of Electrical & Electronics Engineering, Sree Vidyanikethan Engineering College, AP, Tirupati, 517102, India; Kumar N.M.G., Department of Electrical & Electronics Engineering, Sree Vidyanikethan Engineering College, AP, Tirupati, 517102, India; Geetha P., Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, AP, Tirupati, 517102, India; Suresh K., Department of Electrical and Electronics Engineering, Christ (Deemed to be University), Bangalore, India
Performance investigations of five-level reduced switches count ?-bridge multilevel inverter
H-bridge multilevel inverter; pulse width modulation; switching losses; total harmonic distortion
Introduction. This research paper describes a simple five-level single-phase pulse-width modulated inverter topology for photovoltaic grid applications. Multilevel inverters, as opposed to conventional two-level inverters, include more than two levels of voltage while using multiple power switches and lower-level DC voltage levels as input to produce high power, easier, and less modified oscillating voltage. The H-bridge multilevel inverter seems to have a relatively simple circuit design, needs minimal power switching elements, and provides higher efficiency among various types of topologies for multi-level inverters that are presently accessible. Nevertheless, using more than one DC source for more than three voltage levels and switching and conduction losses, which primarily arise in major power switches, continue to be a barrier. The novelty of the proposed work consists of compact modular inverter configuration to connect a photovoltaic system to the grid with fewer switches. Purpose. The proposed system aims to decrease the number of switches, overall harmonic distortions, and power loss. By producing distortion-free sinusoidal output voltage as the level count rises while lowering power losses, the constituted optimizes power quality without the need for passive filters. Methods. The proposed topology is implemented in MATLAB/Simulink with gating pulses and various pulse width modulation technique. Results. With conventional topology, total harmonic distortion, power switches, output voltage, current, power losses, and the number of DC sources are investigated. Practical value. The proposed topology has proven to be extremely useful for deploying photovoltaic-based stand-alone multilevel inverters in grid applications. References 18, table 2, figures 15. 2023, National Technical University "Kharkiv Polytechnic Institute". All rights reserved.
Parimalasundar E.; Muthukaruppasamy S.; Dharmaprakash R.; Suresh K.
Electrical Engineering and Electromechanics, Vol-2023, No. 6, pp. 58-62.
Parimalasundar E., Department of Electrical & Electronics Engineering, Mohan Babu University (Erstwhile Sree Vidyanikethan Engineering College), AP, Tirupati, 517102, India; Muthukaruppasamy S., Electrical and Electronics Engineering, Velammal Institute of Technology, Anna University, TN, Panchetti, 601204, India; Dharmaprakash R., Department of Electrical and Electronics Engineering, Panimalar Engineering College, Chennai, 600123, India; Suresh K., Department of Electrical and Electronics Engineering, Christ (Deemed to be University), Bangalore, India
Fault diagnosis in a five-level multilevel inverter using an artificial neural network approach
artificial neural network; fast Fourier transform; multilevel inverter; sinusoidal pulse width modulation; total harmonic distortion
Introduction. Cascaded H-bridge multilevel inverters (CHB-MLI) are becoming increasingly used in applications such as distribution systems, electrical traction systems, high voltage direct conversion systems, and many others. Despite the fact that multilevel inverters contain a large number of control switches, detecting a malfunction takes a significant amount of time. In the fault switch configurations diode included for freewheeling operation during open-fault condition. During short circuit fault conditions are carried out by the fuse, which can reveal the freewheeling current direction. The fault category can be identified independently and also failure of power switches harmed by the functioning and reliability of CHB-MLI. This paper investigates the effects and performance of open and short switching faults of multilevel inverters. Output voltage characteristics of 5 level MLI are frequently determined from distinctive switch faults with modulation index value of 0.85 is used during simulation analysis. In the simulation experiment for the modulation index value of 0.85, one second open and short circuit faults are created for the place of faulty switch. Fault is identified automatically by means of artificial neural network (ANN) technique using sinusoidal pulse width modulation based on distorted total harmonic distortion (THD) and managed by its own. The novelty of the proposed work consists of a fast Fourier transform (FFT) and ANN to identify faulty switch. Purpose. The proposed architecture is to identify faulty switch during open and short failures, which has to be reduced THD and make the system in reliable operation. Methods. The proposed topology is to be design and evaluate using MATLAB/Simulink platform. Results. Using the FFT and ANN approaches, the normal and faulty conditions of the MLI are explored, and the faulty switch is detected based on voltage changing patterns in the output. Practical value. The proposed topology has been very supportive for implementing non-conventional energy sources based multilevel inverter, which is connected to large demand in grid. References 22, tables 2, figures 17. E. Parimalasundar, R. Senthil Kumar, V.S. Chandrika, K. Suresh.
Parimalasundar E.; Senthil Kumar R.; Chandrika V.S.; Suresh K.
Electrical Engineering and Electromechanics, Vol-2023, No. 1, pp. 31-39.
Parimalasundar E., Department of Electrical & Electronics Engineering, Sree Vidyanikethan Engineering College, AP, Tirupati, 517102, India; Senthil Kumar R., Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology, TN, Chennai, 603203, India; Chandrika V.S., Department of Electrical and Electronics Engineering, KPR Institute of Engineering and Technology, TN, Coimbatore, 641407, India; Suresh K., Department of Electrical and Electronics Engineering, Christ (Deemed to be University), Bangalore, India
Fault Analysis and Compensation in a Five Level Multilevel DC-AC Converter
5-Level; common mode voltage; high frequency mitigation; Neutral clamped active (NCA) inverter; Total Harmonic Distortion
Existing Neutral clamped active (NCA) inverters have the property of high frequency common mode voltage, which can reduce the severity with less voltage gain. A newly designed five level (5L) NCA inverter can capable have achieved voltage step-up with a one stage inversion process. The proposed circuit common ground enhances DC link voltage usage while also mitigating common mode voltage with high frequency. The proposed topology is more compact and has less voltage stress than the conventional two stage topology. The proposed circuit contains merely seven power switches and two capacitors, whereas the conventional topology has ten switches and three capacitors, resulting in a more efficient layout. The proposed topology is developed in the simulink platform, and the simulation results are validated in a proto-type model with a power rating of 2000 W to validate its feasibility and performance with fault clearance capabilities. 2023, TUBITAK. All rights reserved.
El-Cezeri Journal of Science and Engineering, Vol-10, No. 1, pp. 99-108.
https://doi.org/10.31202/ecjse.1164246 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85147803373&doi=10.31202%2fecjse.1164246&partnerID=40&md5=6f41a9c98503dbbc8ce9c841a8d13909
Parimalasundar E., Department of EEE, Sree Vidyanikethan Engineering College, Tirupati, India; Suresh K., Department of EEE, Christ deemed to be University, Bengaluru, India