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          <name>Title</name>
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              <text>Enhancing power conversion efficiency in five-level multilevel inverters using reduced switch topology</text>
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              <text>Efficiency; Inverter; Pulse width modulation; Reduced switch count; Total harmonic distortion</text>
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              <text>This paper presents extensive research on improving the power conversion efficiency of five-level multilevel inverters (MLIs) by utilizing a reduced switch topology. MLIs have received an abundance of focus because of their ability to generate high-quality output waveforms and have better harmonic outcomes than traditional two-level inverters. The high number of switches in MLIs, on the other hand, can result in increased power losses and lower overall efficiency. In this paper, a novel reduced switch topology for five-level MLIs, which is having five switches is proposed with the aim of minimizing power losses while preserving superior performance due to lesser number of switches. To achieve efficient power conversion, the proposed topology employs advanced pulse width modulation control strategies and optimized switching patterns. The simulation results show that the minimized switch topology improves the power conversion efficiency of the five-level MLI, resulting in lower losses and better overall system performance. The total harmonic distortion (THD) value of the output current has been reduced to 7.12% and the efficiency has been achieved to 96.92%. The findings of this investigation help to advance MLI technology, allowing for more efficient and reliable power conversion in a variety of applications such as renewable energy systems, electric vehicles, and industrial drives.  2024, Institute of Advanced Engineering and Science. All rights reserved.</text>
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              <text>Ezhilvannan P.; Ramasamy D.; Subramanian S.K.; Krishnan S.</text>
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              <text>Bulletin of Electrical Engineering and Informatics, Vol-13, No. 3, pp. 1495-1503.</text>
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              <text>Institute of Advanced Engineering and Science</text>
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              <text>2024-01-01</text>
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              <text>&lt;a href="https://doi.org/10.11591/eei.v13i3.6884" target="_blank" rel="noreferrer noopener"&gt;https://doi.org/10.11591/eei.v13i3.6884&lt;/a&gt;
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              <text>All Open Access; Gold Open Access</text>
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              <text>ISSN: 20893191</text>
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              <text>English</text>
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              <text>Ezhilvannan P., Department of Electrical and Electronics Engineering, Mohan Babu University (Erst while Sree Vidyanikethan Engineering College), Tirupati, India; Ramasamy D., Department of Electrical and Electronics Engineering, Panimalar Engineering College, Chennai, India; Subramanian S.K., Department of Electrical and Electronics Engineering, S.A. Engineering College, Chennai, India; Krishnan S., Department of Electrical and Electronics Engineering, Christ Deemed to be University, Bangalore, India</text>
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