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          <name>Title</name>
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              <text>Performance investigations of five-level reduced switches count ?-bridge multilevel inverter</text>
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              <text>H-bridge multilevel inverter; pulse width modulation; switching losses; total harmonic distortion</text>
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              <text>Introduction. This research paper describes a simple five-level single-phase pulse-width modulated inverter topology for photovoltaic grid applications. Multilevel inverters, as opposed to conventional two-level inverters, include more than two levels of voltage while using multiple power switches and lower-level DC voltage levels as input to produce high power, easier, and less modified oscillating voltage. The H-bridge multilevel inverter seems to have a relatively simple circuit design, needs minimal power switching elements, and provides higher efficiency among various types of topologies for multi-level inverters that are presently accessible. Nevertheless, using more than one DC source for more than three voltage levels and switching and conduction losses, which primarily arise in major power switches, continue to be a barrier. The novelty of the proposed work consists of compact modular inverter configuration to connect a photovoltaic system to the grid with fewer switches. Purpose. The proposed system aims to decrease the number of switches, overall harmonic distortions, and power loss. By producing distortion-free sinusoidal output voltage as the level count rises while lowering power losses, the constituted optimizes power quality without the need for passive filters. Methods. The proposed topology is implemented in MATLAB/Simulink with gating pulses and various pulse width modulation technique. Results. With conventional topology, total harmonic distortion, power switches, output voltage, current, power losses, and the number of DC sources are investigated. Practical value. The proposed topology has proven to be extremely useful for deploying photovoltaic-based stand-alone multilevel inverters in grid applications. References 18, table 2, figures 15.  2023, National Technical University "Kharkiv Polytechnic Institute". All rights reserved.</text>
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              <text>Parimalasundar E.; Muthukaruppasamy S.; Dharmaprakash R.; Suresh K.</text>
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              <text>Electrical Engineering and Electromechanics, Vol-2023, No. 6, pp. 58-62.</text>
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              <text>National Technical University "Kharkiv Polytechnic Institute"</text>
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              <text>2023-01-01</text>
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              <text>&lt;a href="https://doi.org/10.20998/2074-272X.2023.6.10" target="_blank" rel="noreferrer noopener"&gt;https://doi.org/10.20998/2074-272X.2023.6.10&lt;/a&gt;
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              <text>All Open Access; Gold Open Access</text>
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              <text>ISSN: 2074272X</text>
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              <text>English</text>
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              <text>Parimalasundar E., Department of Electrical &amp;amp; Electronics Engineering, Mohan Babu University (Erstwhile Sree Vidyanikethan Engineering College), AP, Tirupati,  517102, India; Muthukaruppasamy S., Electrical and Electronics Engineering, Velammal Institute of Technology, Anna University, TN, Panchetti,  601204, India; Dharmaprakash R., Department of Electrical and Electronics Engineering, Panimalar Engineering College, Chennai,  600123, India; Suresh K., Department of Electrical and Electronics Engineering, Christ (Deemed to be University), Bangalore, India</text>
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