Dublin Core The Dublin Core metadata element set is common to all Omeka records, including items, files, and collections. For more information see, http://dublincore.org/documents/dces/. Title A name given to the resource Articles Article Faculty Publications -Articles Dublin Core The Dublin Core metadata element set is common to all Omeka records, including items, files, and collections. For more information see, http://dublincore.org/documents/dces/. Title A name given to the resource An Efficient Sorting Algorithm for Capacitor Voltage Balance of Modular Multilevel Converter With Space Vector Pulsewidth Modulation Subject The topic of the resource Analogue sorting; capacitor voltage balancing; modular multilevel converters (MMCs); space vector pulsewidth modulation (SVPWM) Description An account of the resource Thisarticle presents an efficient analogue sorting algorithm for balancing the submodule (SM) capacitor voltages of modular multilevel converter (MMC). The proposed analogue sorting algorithm offers the advantage of fast convergence rate without any need of recursive loops for the implementation on embedded devices. It can be easily implemented with combinational logic operations on field programmable gate array (FPGA) and provides less hardware and computational overhead. The functionality and performance of the proposed analogue sorting algorithm is evaluated with the simulation model of three phase five-level MMC in MATLAB/Simulink environment. The real time implementation of the proposed sorting algorithm with the SM capacitor voltage balancing strategy is implemented on Altera/Cylone - I (EP1C12Q240C8N) FPGA. A five-level continuous space vector pulsewidth modulation (CSVPWM) is realized on a PIC microcontroller (PIC18F452). A down-scaled model of single-phase five-level MMC is designed and constructed to investigate the reliable and stable operation of MMC with the proposed analogue sorting algorithm and SVPWM method. Simulation and experimental results are presented for validation. 1986-2012 IEEE. Creator An entity primarily responsible for making the resource Muthavarapu A.K.; Biswas J.; Barai M. Source A related resource from which the described resource is derived IEEE Transactions on Power Electronics, Vol-37, No. 8, pp. 9254-9265. Publisher An entity responsible for making the resource available Institute of Electrical and Electronics Engineers Inc. Date A point or period of time associated with an event in the lifecycle of the resource 2022-01-01 Identifier An unambiguous reference to the resource within a given context <a href="https://doi.org/10.1109/TPEL.2022.3160665" target="_blank" rel="noreferrer noopener">https://doi.org/10.1109/TPEL.2022.3160665</a> <br /><br /><a href="https://www.scopus.com/inward/record.uri?eid=2-s2.0-85126708135&amp;doi=10.1109%2FTPEL.2022.3160665&amp;partnerID=40&amp;md5=78bd2b363c7cbfe0d01827bcc9f6e2ce" target="_blank" rel="noreferrer noopener">https://www.scopus.com/inward/record.uri?eid=2-s2.0-85126708135&amp;doi=10.1109%2fTPEL.2022.3160665&amp;partnerID=40&amp;md5=78bd2b363c7cbfe0d01827bcc9f6e2ce</a> Rights Information about rights held in and over the resource Restricted Access Relation A related resource ISSN: 8858993; CODEN: ITPEE Format The file format, physical medium, or dimensions of the resource Online Language A language of the resource English Type The nature or genre of the resource Article Coverage The spatial or temporal topic of the resource, the spatial applicability of the resource, or the jurisdiction under which the resource is relevant Muthavarapu A.K., Aditya Engineering College (A), Electrical and Electronics Engineering Department, Surampalem, 533437, India; Biswas J., Christ University, Department of Computer Science, Bengaluru, 560029, India; Barai M., National Institute of Technology, Department of Electrical Engineering, Kozhikode, Calicut, 673601, India