Dublin Core The Dublin Core metadata element set is common to all Omeka records, including items, files, and collections. For more information see, http://dublincore.org/documents/dces/. Title A name given to the resource Articles Article Faculty Publications -Articles Dublin Core The Dublin Core metadata element set is common to all Omeka records, including items, files, and collections. For more information see, http://dublincore.org/documents/dces/. Title A name given to the resource A hybrid level shifted carrier-based PWM technique for modular multilevel converters Description An account of the resource This paper presents a hybrid level shifted carrier-based pulse width modulation (HLSC-PWM) technique for modular multilevel converters (MMCs). The concept of the proposed HLSC-PWM method is developed by combining the principles of phase disposition PWM (PD-PWM), phase opposition disposition PWM (POD-PWM), and alternate phase opposition disposition PWM (APOD-PWM) methods. The main aim of the proposed HLSC-PWM method is to generate an output voltage with half-wave and quarter-wave symmetries. The generated symmetrical PWM output voltage based on the proposed HLSC-PWM method provides less total harmonic distortion (THD) and enhances the DC-Link voltage utilization (DCLVU). A generalized mathematical model is formulated to develop a single HLSC for MMC with an N number of submodules (SMs) per arm. Theoretical analysis of DCLVU for the proposed method is described. The functionality and performance of the HLSC-PWM method are carried out on a three-phase five-level MMC in MATLAB/Simulink. A hardware prototype of a single-phase five-level MMC is designed for experimental validation. The proposed HLSC-PWM method is implemented on an Altera/Cyclone I series (EP1C12Q240C8N) field-programmable gate array (FPGA), simulation and experimental results are presented. 2021 The Authors. IET Power Electronics published by John Wiley &amp; Sons Ltd on behalf of The Institution of Engineering and Technology Creator An entity primarily responsible for making the resource Aswini Kumar M.; Gopi A.K.; Biswas J.; Barai M. Source A related resource from which the described resource is derived IET Power Electronics, Vol-14, No. 13, pp. 2219-2233. Publisher An entity responsible for making the resource available John Wiley and Sons Inc Date A point or period of time associated with an event in the lifecycle of the resource 2021-01-01 Identifier An unambiguous reference to the resource within a given context <a href="https://doi.org/10.1049/pel2.12173" target="_blank" rel="noreferrer noopener">https://doi.org/10.1049/pel2.12173</a> <br /><br /><a href="https://www.scopus.com/inward/record.uri?eid=2-s2.0-85111887984&amp;doi=10.1049%2Fpel2.12173&amp;partnerID=40&amp;md5=809b0a5fade6e4f763cb8c3a78530a47" target="_blank" rel="noreferrer noopener">https://www.scopus.com/inward/record.uri?eid=2-s2.0-85111887984&amp;doi=10.1049%2fpel2.12173&amp;partnerID=40&amp;md5=809b0a5fade6e4f763cb8c3a78530a47</a> Rights Information about rights held in and over the resource All Open Access; Gold Open Access Relation A related resource ISSN: 17554535 Format The file format, physical medium, or dimensions of the resource Online Language A language of the resource English Type The nature or genre of the resource Article Coverage The spatial or temporal topic of the resource, the spatial applicability of the resource, or the jurisdiction under which the resource is relevant Aswini Kumar M., Electrical Engineering Department, NIT-Calicut, Calicut, India; Gopi A.K., Electrical Engineering Department, NIT-Calicut, Calicut, India; Biswas J., Department of Computer Science, Christ University, Bengaluru, India; Barai M., Electrical Engineering Department, NIT-Calicut, Calicut, India