Dublin Core The Dublin Core metadata element set is common to all Omeka records, including items, files, and collections. For more information see, http://dublincore.org/documents/dces/. Title A name given to the resource Articles Article Faculty Publications -Articles Dublin Core The Dublin Core metadata element set is common to all Omeka records, including items, files, and collections. For more information see, http://dublincore.org/documents/dces/. Title A name given to the resource Design of digital filters for multi-standard transceivers Subject The topic of the resource Digital Filter; FPGA; Hardware Reduction; Low Power Design; Multi-rate Decimation Filter Description An account of the resource This paper addresses on three different architectures of digital decimation filter design of a multi-standard RF transceivers. Instead of using single stage decimation filter network, the filters are implemented in multiple stages using FPGA to optimize the area, delay and dynamic power consumption. The proposed decimation filter architectures reflect the considerable reduction in area and dynamic power consumption without degradation of performance. The filter coefficients are derived from MATLAB, the filter architectures are implemented and tested using Xilinx SPARTAN FPGA.First, the types of decimation filter architectures are tested and implemented using conventional binary number system. Then the two different encoding schemesi.e. Canonic Signed Digit (CSD) and Minimum Signed Digit (MSD) are used for filter coefficients and then the architecture performances are tested.The results of CSD and MSD based architectures show a considerable reduction in the area and power against the conventional number system based filter design implementation. The implementation results reflect that considerable reduction in area of 47.89% and dynamic power reduction of 28.64% are achieved using hybrid architecture. 2015 School of Electrical Engineering and Informatics. All rights reserved. Creator An entity primarily responsible for making the resource Latha R.; Vanathi P.T. Source A related resource from which the described resource is derived International Journal on Electrical Engineering and Informatics, Vol-7, No. 3, pp. 517-530. Publisher An entity responsible for making the resource available School of Electrical Engineering and Informatics Date A point or period of time associated with an event in the lifecycle of the resource 2015-01-01 Identifier An unambiguous reference to the resource within a given context <a href="https://doi.org/10.15676/ijeei.2015.7.3.13" target="_blank" rel="noreferrer noopener">https://doi.org/10.15676/ijeei.2015.7.3.13</a> <br /><br /><a href="https://www.scopus.com/inward/record.uri?eid=2-s2.0-84943413612&amp;doi=10.15676%2Fijeei.2015.7.3.13&amp;partnerID=40&amp;md5=df86da60e95919a9d0ad4e13e9c90e60" target="_blank" rel="noreferrer noopener">https://www.scopus.com/inward/record.uri?eid=2-s2.0-84943413612&amp;doi=10.15676%2fijeei.2015.7.3.13&amp;partnerID=40&amp;md5=df86da60e95919a9d0ad4e13e9c90e60</a> Rights Information about rights held in and over the resource All Open Access; Gold Open Access; Green Open Access Relation A related resource ISSN: 20856830 Format The file format, physical medium, or dimensions of the resource Online Language A language of the resource English Type The nature or genre of the resource Article Coverage The spatial or temporal topic of the resource, the spatial applicability of the resource, or the jurisdiction under which the resource is relevant Latha R., Department of Electronics and Communication Engineering, Christ University, Bangalore, 560060, India; Vanathi P.T., Department of Electronics and Communication Engineering, P.S.G. College of Technology, Coimbatore, 641 004, India