Integrated synchronous buck converter emulation and method of design thereof /

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Title

Integrated synchronous buck converter emulation and method of design thereof /

Subject

Communication

Description

Patent Number: 201941035816, Applicant: Jayanta Biswas.
The present invention is related to the Buck converter output ripple voltage analysis field, more particularly, the present invention is related to integrated synchronous buck converter emulation and method of design thereof. A DC-DC synchronous buck converter is emulated on FPGA based on geometric model of average inductor current.

Creator

Biswas, Jayanta.

Publisher

Intellectual Property India

Date

2019

Language

English

Type

Patent

Collection

Citation

Biswas, Jayanta., “Integrated synchronous buck converter emulation and method of design thereof /,” CHRIST (Deemed To Be University) Institutional Repository, accessed November 22, 2024, https://archives.christuniversity.in/items/show/2348.

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