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                <text>Faculty Publications</text>
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    <name>Conference Paper</name>
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          <name>Creator</name>
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              <text>Prasanna, V.; Priyadharshni, M.; Senthilnathan, S.</text>
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              <text>A Comprehensive Survey on Decoder Design using Quantum-dot Cellular Automata</text>
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          <name>Date</name>
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              <text>01-01-2025</text>
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              <text>Proceedings of the 6th International Conference on Electronics and Sustainable Communication Systems, ICESC 2025;pp.74-81</text>
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          <name>Identifier</name>
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              <text>&lt;a href="https://doi.org/10.1109/ICESC65114.2025.11212551" target="_blank" rel="noreferrer noopener"&gt;https://doi.org/10.1109/ICESC65114.2025.11212551&lt;/a&gt; &lt;br /&gt;&lt;br /&gt;&lt;a href="https://www.scopus.com/pages/publications/105022658769?origin=resultslist" target="_blank" rel="noreferrer noopener"&gt;https://www.scopus.com/pages/publications/105022658769?origin=resultslist&lt;/a&gt;</text>
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              <text>Prasanna V., Easwari Engineering college, Department of ECE, Chennai, 600089, India; Priyadharshni M., Easwari Engineering college, Department of ECE, Chennai, 600089, India; Senthilnathan S., CHRIST University, Department of ECE, Bangalore, India</text>
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              <text>QCA offer a compelling alternative to CMOS technology, providing benefits such as low power consumption, high speed, high density, and the ability to surpass the nanoscale limitations of CMOS. QCA is increasingly being adopted in VLSI designs as a solution for reducing power consumption and thermal dissipation. This paper analyzes the area, cell count, and latency of different 2:4 decoders to determine the most efficient design based on these factors. Decoders play a critical role in Quantum-dot Cellular Automata(QCA) by enabling efficient data routing, memory addressing, and logic control while minimizing power consumption and reducing interconnect complexity. The study employs a specialized logic gate known as the Toffoli gate, which is renowned for its capability in reversible computing, allowing information processing without data loss. Future advancements in 2:4 decoders using QCA should prioritize optimizing clocking schemes, improving fault tolerance, and developing scalable architectures to address fabrication challenges and enhance reliability in practical applications. The circuits are simulated using QCA Designer software.  2025 IEEE.</text>
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              <text>Decoder; layers; Majority gate; QCA; QCA designer tool; Reversible Gate; Toffoligate</text>
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          <name>Publisher</name>
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              <text>Institute of Electrical and Electronics Engineers Inc.</text>
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              <text>ISBN: 979-833155503-0;</text>
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              <text>English</text>
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              <text>Restricted Access; Hardcopy may be available in the library</text>
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              <text>online</text>
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