ItemArticle

DFT Aware Test Architecture for Communication ICs: ATPG-Based Fault Detection on Lower Technology Node

Title
DFT Aware Test Architecture for Communication ICs: ATPG-Based Fault Detection on Lower Technology Node
Creator
Supriya, B.K.; Arunraja, A.; Gandhimathi, Bremiga Gopalan; Sheeba Rani, S.; Sudhakar Reddy, N.; Sahoo, Deepali Rani
Description
In this research, hafnium dioxide (HfO2) and titanium dioxide (TiO2) are investigated as advanced gate dielectrics for GaN-based MISHEMTs on diamond substrates. AlGaN/GaN MISHEMTs, incorporating HfO2 and TiO2 as gate dielectrics, have been rigorously analyzed and optimized for RF and DC performance through ATLAS TCAD simulations. The MISHEMTs with HfO2 gate dielectrics exhibited impressive metrics: a high drain current density (IDS) of 3.62 A/mm, a breakdown voltage (VBR) of 998 V, a transconductance (gm) of 1.09 S/mm, and a cutoff frequency (fT) of 49 GHz. Conversely, the MISHEMTs utilizing TiO2 as the passivation layer demonstrated even superior performance, achieving an IDS of 3.7 A/mm, a V_B of 1168 V, a gm of 1.13 S/mm, and an fT of 48 GHz. Both dielectric materials contributed to a notably low on-resistance of 4.9 ?mm. The synergistic effect of the diamond substrate with high-performance HfO2 or TiO2 gate dielectrics positions these MISHEMTs as highly promising candidates for next-generation power switching and RF applications, due to their enhanced efficiency and robustness under high-power and high-frequency conditions. The proposed work improves the performance enhancement of Metal-Insulator-Semiconductor High Electron Mobility Transistors (MISHEMTs) with inclusion of diamond substrate. Diamond substrate to its wide energy bandgap ranges of 5.5 eV for used materials for both power electronics and RF applications electrical and Thermal properties are concerned in its high. 2025, Society for Communication and Computer Technologies. All rights reserved.
Source
Journal of VLSI Circuits and Systems;Volume;7;Issue;1;pp.106-117
Date
01-01-2025
Publisher
Society for Communication and Computer Technologies
Subject
ATLAS TCAD; Breakdown voltage; High drain current density; High Electron Mobility Transistors; MISHEMTs; Transconductance
Coverage
Supriya B.K., Department of Information Science and Engineering, PES College of Engineering, Karnataka, Mandya, India; Arunraja A., Department of ECE, Christ University, Kengeri Campus, Karnataka, Bengaluru, India; Gandhimathi B.G., Department of Law and Business, Northumbria University, London Campus, Coventry, United Kingdom; Sheeba Rani S., Department of Electronics and Communication Engineering, Sri Eshwar College of Engineering, Tamil Nadu, Coimbatore, India; Sudhakar Reddy N., Department of Electronics and Communication Engineering, School of Engineering, Mohan Babu University, Andhra Pradesh, Tirupati, India; Sahoo D.R., Manipal Law School, Manipal University, Jaipur, India
Rights
All Open Access; Gold Open Access
Relation
ISSN: 25821458;
Format
online
Language
English
Type
Article

Citation

Supriya, B.K.; Arunraja, A.; Gandhimathi, Bremiga Gopalan; Sheeba Rani, S.; Sudhakar Reddy, N.; Sahoo, Deepali Rani, “DFT Aware Test Architecture for Communication ICs: ATPG-Based Fault Detection on Lower Technology Node,” CHRIST (Deemed To Be University) Institutional Repository, accessed June 20, 2026, https://archives.christuniversity.in/items/show/23487.

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